Testing bare-metal 68008 boards


Logic Analyzer Trace

68008 on logic analyzer with bus error

Logic analyzer trace of a 68008 during a bus error (in 1986).

The first “hello world” equivalent in the embedded world was particularly vague. There were very few examples, and the Mircotec compiler books took some time to wade through. They were very good, and the compiler was much better than the versions on 68000 Unix boxes. Bare metal testing was stepping off the edge of a cliff. Fortunately, Conlog had a reasonable logic analyzer.

The photo is a bit small, but we don’t want to empty your black ink cartridge if you print it out. But if you insist, then click here for a larger picture (66kBytes or 400 × 349)

The signals from top to bottom are:

The sampling clock was 50ns and the display is 5 microseconds per division. The processor was most likely being clocked at 8 MHz.


Scope testing 68008 board

Scope testing on a loop

Scope testing a 68008 running in a loop using one of the monitor functions and triggering on one of the control signals. Not sure what the trace was, but a guess is R/W, DS, AS, clock. This would have been in 1986 or 1987.

The scope was a 4 channel 100 MHz Iwatsu model, while the processor clock probably ran at 8 MHz on the early boards. The 68000 had several clock cycles per instructions as it was microcoded, rather than hard-coded like RISC devices. On the original picture before shrinking for the web, the clock line had glitches on the edge of the third channel. These are the sort of problems that need to be tracked down before sending the board off into the woods. Decoupling or layout would most likely be the problem, and a quick cut of a trace with a wire link would prove or disprove that theory. It was also the reason why we placed power and ground on the inside layers of multi-layer boards, so that tracks could be cut.

What is the relevance of this? Would it not be nice if you could embed a scope function in a board? 0n 21st January, 2008, Vitesse Semiconductor announced VScope, which embed a scope and signal generator inside a video cross-point switch (up to 10G data rates). We had a quick look at the saved webpage from 2008, but the DesignCon/2008 page and paper they presented was not available. Anyway, visit their website at vitesse.com/vscope for details of what is possible with some videos — and also well patented.

In 2011, we priced some scopes we would be interested in to work with decent speed SERDES links. At $24,000, we have to wait. What about a logic analyzer. These don’t do factories, so if you want one for a high speed packaging line, then you are going to have to leave it in the design when shipping to a customer. That cuts out any units from Agilent or Tektronix. The alternative is a FPGA with a hardened DDR interface to external memories, on-board memory, SERDES links to take the signals out, and reasonable prices for software. We think we have found this in Lattice Semiconductor’s Versa board. Throughout this website you will see how we struggled with prototypes without decent trace ports or visibility. We feel it is time to change that.