A collection of backplanes

A collection of backplanes. Top left is an 8-slot Zilog Z-BUS backplane interonnect, bottom left is a 4-slot Bicc Vero VME bus backplane with passive terminators on either side, next to a 3-slot TreNew VME backplane with active termination, and the 7-slot SABUS backplane on the right hand side.

Backplanes were common when processors were single chips with external memory and peripherals. We used several bus structures, as shown on the right. See Chapter 7 (pp 69—76) of Micro processor course notes (PDF) 5,6Meg for additional notes on bus selection. Although not mentioned in the notes, there were plenty of datasheets about LVDS and BUS LVDS on National Semiconductor’s website some years back.

Future Direction

We placed these backplanes here to justify moving to serial links on FPGAs for point-to-point connections in the near future.

STD BUS in 1980 and 1981

This was a bus made popular by several companies shipping Z80 systems. My master’s thesis project was based on a Z80 CPU in a STD BUS rack.

Multibus I in 1982 or 1983

Multibus I was popular with 16-bit systems. Originally developed by Intel for their x86 family, we used it for Z8001/2 and intended to use it for the NS32016. We bought a card cage, extender boards, and wire wrap cards from the National Semiconductor agents, but their Multibus I card for the NS32016 was replaced by a DIN41612 stacking arrangement. We had our hands full trying to complete the masters and the 32016 was a bit expensive with no software.


SABUS was a 16-bit bus defined by a group in South Africa during sanctions. Pricing was good for Z80 and 8085 systems, but never moved to anything more powerful. It did have DIN41612 connectors before VME was defined.


VME bus was defined by Motorola for their 68000 processor. The original Versabus looked like a big Multibus I board with gold finger edge connectors. The DIN41612 connector was a welcome relief. We adopted the pinouts, but not the message passing as per the VIC and VAC chips from Cypress Semiconductor.

VME was a bit complex for simple industrial automation, and the multiprocessor bus was not that easy to work with. The other processors generally mapped dual-ported shared memory in different address spaces on the bus for the other processors. The interface chips also handled DMA into the other processor’s address space. The bus was closely aligned with the 68000 processor signals. Other processors were designed into VME racks, but they often did not used many of the signals — an example was the IDT 3081 MIPS board designed by Algorithmics for Radstone.

Zilog’s Z-BUS

Zilog was not a significant player in the backplane market, however, they were well placed in the early 1980s with the Z80 for automation projects. The DIN41612 connector is interesting as it is the first to come out of the USA where designers seemed to follow each other along the gold finger edge connector form-factor. We did not design around Z-BUS, but it was used in Zilog’s System 8000 computer.