Signal Screening

SABUS backplane

SABUS backplane designed by Ian Clark in 1988. Note the interleaved ground lines and holes mid-way between the connector holes for swapping over the ground routing.

SABUS cards

Some SABUS boards designed by Ian Clark in 1988.

Work done from 1984 to 1989

The bus was defined by a group in South Africa in the 1980’s. We are not sure of the exact dates or authors, but Karl Stirling was involved in making the bus popular. Another company was Basic Electronics in Durban. We designed a Z8002 SABUS card for Basic Electronics, which was probably done in 1984.

We designed a whole range of SABUS boards, some which are documented here. The backplane was designed as a two layer board with interleaved screening. The DIN41612 connector only used the A and C rows, which made is easy to run a strip down the middle of the connector rows and then run off strips to shield the signal lines. We had seen numerous articles on VME bus termination problems, ringing at the end of a 21 slot VME backplane, FutureBus backplanes etc, so this was a very cheap solution. We are not sure if the Vero Bicc patents applied to our design. These are covered in the VME section. The end of the backplane allowed a connector to be soldered on the solder-side so that cards could be plugged in without requiring an extender card (which was at least 220 mm long and would add significantly to any ringing problems. Other SABUS vendors did have extender cards with ground lines between signal tracks, which was standard practice then. Not sure what was used on earlier backplanes, but we do not think the Vero Bicc patents should have been awarded.

SABUS backplane terminator

The VME backplane vendors had used reversed DIN41612 connectors on the last slot for the use of termination boards. These were pullup and pulldown resistor arrays. Others used active termination with a Thevenin equivalent termination for much lower power dissipation. We never got around to making a termination plug-in, but did use the reverse connector for debugging. We were running the bus at a fairly slow speed (8 MHz 68008 processor) and never found the need to terminate the bus.

SABUS backplane layout

One side of the backplane layout scanned in many years later and coloured to show the ground lines on the one side.


During sanctions in South Africa, business was fairly robust for the low-cost boards. Parallel backplanes were simple to design around, but over time, increasingly complex new designs were introduced.

About twenty years later, the CompactPCI and VME bus markets are no longer as popular possibly due to the increasing gap between bus speed and processor clock rates. Another reason is most likely the high cost of any Eurocard racking systems.

Fast forward thirty years, and evaluation boards do not have a bus, so they are not useful for deployment when interfacing to 24VDC is required. So what will we be doing? The SoC has changed many requirements, but factory automation still needs multiple boards. Serial bus interfaces are attractive, and we will try some low-cost FPGAs over some short backplanes with Erni 5- or 10 GHz connectors. Trying to route wide bus traces around a board is no fun.