Imager FPGA Project

The imager was developed in 2000 as a subcontractor. The Altera FPGA used Altera schematic capture tools and simulator. The Altera programmer was purchased in 1994 for the FRD MIPS board. The Flex 8000 FPGA family and serial configuration memory was also from that era, but good enough for a quick project.

Altera FPGA on the imager board

Altera Flex 8000 FPGA controlling the data capture and dual port memory control. It also provided VME decoding. This made it critical that it came up after power-up, and the first slow rising power supply caused havoc.

Tyre Width Imaging Project

The board was developed to measure the tread widths of two treads exiting an extruder in a tyre plant. We used some prior stock 3U 68000 Oettle & Reichler VME bus processor cards. Our 6U card included 64 differental inputs from the various optical scanners, 64-outputs of 24mA each, 16 status LEDs, and 16 DIL setup switches.

Related information

See Imager Hardware in the 68000 section for more information about the imager card and additional boards.

Comments

We populated this page at the end of August, 2011, almost eleven years after the original project. The whole project would fit into a moderately priced FPGA, plus include a 32-bit soft core. We used the FPGA for glue logic, some control for counters to address the external dual-port RAM, and to handle an input stream that a 16 MHz 68000 processor could possibly have handled, but the risk was too high. Today, a couple of dollars for a 100 MHz ARM could also handle the complete project. We will be moving future FPGA designs to high-speed serial connectivity and debug assistance. We would also like to include embedded logic analysis as the prices of so called commodity instruments is anything but “commodity pricing”.


Altera FPGA simulation output

Altera Flex 8000 simulation output.

A snapshot of the simulation output is shown to the left. This was scanned in from the printed documentation as we no longer keep an electronic copy of the project in our “bit rot” collection on terabyte drives.


Altera schematic capture

The schematic capture used Altera’s tools. There was a fair bit more than shown here!

In our opinion, when the Altera programming tools were purchased in 1994, they were better than equivalent Xilinx offerings—price for one, but also a very nice schematic capture interface. Xilinx did improve their offerings a few years later. The Verilog/ VHDL was very expensive and at the time Altera had their own language, AHDL. They also provided the complete 74xx series equivalents and gave both the AHDL versions and schematic primitives.