BetaTech FPGA Trials

FPGA on Coldfire board

Xilinx Spartan 30K gate with ColdFire on the second BetaTech ColdFire board. BetaTech wanted a really low-cost board which is why the FPGA was a relatively small device.

For more details on the ColdFire programming, see BetaTech Base Board. After the initial “bare metal” and VHDL tests, we concentrated on the Linux port.

We contributed to the specification of the second BetaTech ColdFire board. There were several features we wanted to test—Ethernet downloads of bit streams and loading up the FPGA using a processor rather than vendor configuration memory. The Xilinx bit stream needed to be bit swapped within a byte plus a couple of other pins would have to be toggled. We used the Wishbone IP bus interface and added in several peripherals from the OpenCores website. Other features that BetaTech wanted to test were combining the processor and FPGA JTAG chains. There were issues that were documented in chapter 3, “Booting” of ColdFire Embedded System (3,5 Mbytes) about resetting the boards between downloads, so we kept the chains separate and used the Xilinx download cable.

Loading up FPGAs in our proposed designs, plus references are described in “MIPS Concept Design for Software Instrumentation”, dated 2006. We have included the IDT574design.pdf (307 kBytes) here. Have a look at the references 4, 5, 7, 17, 20 and 21 (pages 41 and 42) which have hyperlinks to where they were referenced. The motivation for the download was inspired by the BrightStar Engineering board, the Catapult project at Sydney University and the Configurator in the Xilinx XCell journal. We never did get to test the bit swap and a student who was given it as a project never completed the course. The download via the processor was tested by Allan from BetaTech.

The new ARM micro-controllers with large Flash or SD cards would be ideal loaders (some years later). The Freescale Kinetis-K40 and K60 evaluation boards have Micro-SD and SD cards. The first trials with the IAR toolchain and the MQX RTOS tested the FAT32 file system on the K60 Tower kit. We bought a different toolchain (Rowley Associates) and will test the SD cards in time. Loading up both FPGAs and RAM, plus programming Flash will be simplified for customers if off-loaded onto a small dedicated processor. The interface might be a small plug-in card to sell as a standard product with complete design files and application notes.