IDT385 MIPS Evaluation Board

Timeline of IDT385 evaluation
IDT385 Evaluation board

In 1993, Prime Source in Johannesburg advertised the 25 MHz IDT385 evaluation board. The comprehensive documentation was written by Dominic Sweetman and Nigel Stephens of Algorithmics, who supplied the toolchain—C compiler, MIPS assembler and linker. In 1993, 60 MHz was the state-of-the-art Pentium in PC land, while SPARC approached 100 MHz. To pick up a reasonably priced RISC board was unusual, particularly one designed for testing. Have a look at the numerous logic analyzer probes, the large headers for ribbon cable and wire wrap area. The components were possibly the last of the 0,1 inch pin spacing and 5V power supply. From here on, packaging rapidly moved to TQFP, lower voltages and little outside visibility with increasing levels of integration.

Power was supplied from a standard PC hard drive connector (+5V, +12V and 0V). The two serial ports were used for software debugging and downloading. I wrote a terminal emulator for SunOs, Linux and various other flavours of Unix. With “dual port” (shared memory on the Linux box), I could download the software over the link, inject debug scripts into the shared memory, and also get snapshots of the shared memory. This allowed the terminal emulator to effectively have 512 kBytes of “dual ported” memory that other programs on a Linux box could read out. Various TCL scripts were developed for testing.

Other than the serial ports, there was a counter that could be used to periodically interrupt the processor, which was the start of a basic real-time kernel. Other tests involved comparing cached and non-cached program execution timing. By placing the processor in a tight loop, a scope could trigger on a chip select to examine the timing waveforms. Once the processor had been through the Algorithmic example code, it was time to access I/O. At this stage we decided to design a VME board. A problem was the lack of source code for the monitor, so the next design would need to have the same memory map as the evaluation board to start by “borrowing” the EPROMs. See MIPS public domain board.

The evaluation board worked as promised. An upgrade from SDE4 to the SDE5 toolchain on Linux did not support the IDT385 board. The example code was long lost. The download code and S3 conversion are in a zipped tarball idt385.tgz 49 kBytes. The original SDE4 ran in a DOS window, but we moved to SDE under Linux, hence the download and other support code. The tarball includes a S3 file.