Z80 Timing Diagram

Timing diagram of Z80 dynamic RAM refresh


Timing diagram of the Z80 for a dynamic RAM refresh cycle

When we designed our first processor cards, we worked out the access times, the speed requirements for memory and peripherals. It was all fairly new back in 1981. We also wanted to have a way to document timing diagrams, so we wrote a program to do that. The diagrams found their way into the appendices of my thesis, but the program was written in Basic for a Tektronix graphics computer that is most likely in some landfill by now.

The diagrams were scanned in thirty years later with a high resolution scanner, so the back or diagram behind tends to “shine through”. We fiddled a bit with a graphics editor to get the contrast to eliminate the second bleed.

The timing value were inout via tables that were saved to disk for later editing if necessary. The plots were on a pen plotter, and in the early 1980s, the lines were not uniform with the pens. The originals were done on decent paper that did not clog up the pens, but for the thesis and related documentation, normal photostat paper was used.

The scale was in nanoseconds as the processor only ran at 4MHz, but for high-end design with sub-nanosecond memory access, a similar exercise is necessary. Thankfully we don’t do much of that anymore!