Z80 Static Tester

Z80 static testing printed circuit board

Static tester for a Z80 around 1982.

4 channel scope

After the static tests, EPROMs were programmed with several thousand sequences of NOP instructions and a jump at the end back to the beginning of the loop. The repetitive pattern was easy to trigger on, making timing diagram verification with a four channel oscilloscope possible.

With a Z80 you could also place 00 onto the data bus for a NOP and the processor would swing through its address range linearly forever, making it easy to probe around a board for address decoding problems or stuck address lines.

The Jurassic Era of Microprocessors

Our Z80 work was a lot simpler than later 68000 and Z8000 static tester projects, but to debug processors in the Jurassic era you needed a lot of luck or a lot of patience. As the only luck we had was bad luck, we chose patience. The state of design at the time was to read the processor manual from cover to cover, then pick a few parts from the Texas Instruments TTL 74 series Databook. There were hundreds of parts, much like the FPGAs primitives when entering a design as a schematic. There were octal buffers, decoders, multiplexors, AND and OR gates.... A simple board without bipolar PROMs for decoding or state machines, PALs or GALs could get by with little testing other than power and ground. With PROMs, PALs or GALs, a static test was worth the extra effort, as at least the hardware was functional. No manner of struggles with software would overcome faulty hardware, and individuals did not own logic analyzers or ICEs, so there would be little visibility if the processor went into the weeds.

The board shown here is a layout of my earlier (1981) debug efforts to get working Z80 hardware. It was routed by one of the engineers in his spare time and he also made himself a board. Atlas Aircraft had an auto-router with a dedicated mini-computer, photo-plotters and software that cost plenty — this was state of the art in 1982. In spite of the investment in printed circuit board capability, our section could not get a dot-matrix printer, so we had to work off 24-line terminal screens without hardcopy for markup. To get some low-cost assistance for processor visibility was not frowned upon.

There were several status lines (buffered with transistors to drive the green LEDs, a ZIF 40 pin socket that would take a ribbon cable to a test card or a logic clip for breakpoints and single step. The edge connector was for STDbus cards that were used in my master’s project. The hex displays were Texas Instruments TIL311 with decoders and drivers. There were six displays — four for the 16-bit address bus and two for the 8-bit data bus. The two add-on boards were 555 timers for faster clocks than toggle switches, and to ramp address counters.

Future Debuggers

Fast forward thirty years to 2011, and we would put all this into a FPGA. Nothing special, but we will reference prior art to avoid the debug patent minefield.