“Bare metal” generally refers to the practice of having to boot a processor from its first instruction, load up registers, initialise peripherals, clear out the stack, and move code from Flash into read/ write memory. The couple of thousand pages are not bedtime reading of how each bit affects some peripheral or the cache, etc.
In moments of weakness we purchase an evaluation board to do just that. We probe around the board, changed their way of defining the register writes, and exercised all the on-board and on-chip peripherals. Then we put it back into the box where its value quickly ramps down to zero as the next board is announced. There is always some disappointment — the boards are rushed out to be married to the silicon as it comes out of the ovens, mostly not properly baked and some parts still raw. Prototype silicon is a huge leap of faith, as you choose a device with the intention of being able to use it in a product a year down the line when the bugs have been ironed out in at least two revisions. By now it is two years behind the PowerPoint slides in the customers' next project (which won't ship for at least a year, and for more complex devices, exponentially longer). Waiting for software upgrades to evaluation boards with “prototype” marked onto the silicon is almost as futile in getting a mobile phone fault fixed. The next model is out before the older one is even debugged, and so the cycle continues. Dicey FPGAs are even worse and we don’t know how to single-step VHDL.
This year we were interested in Freescale’s Kinetis range of 32-bit ARM Cortex-M microcontrollers. We settled on the Kinetis K64 which has Ethernet, CAN, analog, several serial ports and digital I/Os. Intelligent I/O boards are now within reach that can use ideas from the Maruti real-time work almost two decades ago.
This kind of self torture was to keep “processor fit” but we find potential customers or employers ask minute details about the processor they have chosen (out of the thousands out there which will all become obsolete before the project is complete). We have programmed over a dozen systems from static tester pods, running NOPS to test address decoding, then to JTAG ports. It was fun, but there is little value attached to this difficult task, so it too moved to Asia with all those other expensive jobs.
This page is a place holder for a huge amount of embedded documentation that is looking for a home. But you’ll have to wait for the “to do list” queue to subside. We are not offering to do this work, we will document the tools we used and if there is any value in them, then we may resurrect some. (The releases will probably be new projects in the form of Wiki pages).
Our preferred target for micro-controllers is the ARM Cortex-M series, and the Cortex-A series for more capable devices. We use Rowley Associates’ ARM toolchain on Apple hardware for JTAG debugging.
Our next best target is one where development is paid for and the target is at least 32-bits.
Figure 3. Freescale's Freedom K64 board. We bought a couple in 2014 to test out networking for smart sensors.
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